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preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 1 of 17 3 a / 15 v synchronous switching mode 1/2cell li - ion chargers with power path selector general description the lp28 400 is a complete constant - current/ constant - voltage switch mode charger for 1 cell or 2cell lithium - ion batteries. 1.5mhz synchronous switching charger with 3a integrated mosfets. no external blocking diodes is required. the switch mode charger uses a high switching frequency to reduce power dissipation during charging eliminate heat and allow tiny external components. i t can operate from a single input that accepts. all power switches for charging and switching the load between battery and external power are included on - chip that can be embedd ed in a wide range of handheld a pplications , built - in p ower p ath c ontroller, e asily i nstallation with e xternal mosfets , dynamic power management, better thermal performance . the lp28 400 includes complete charge termination circuitry , automatic recharge and a 1% output voltage. fault condition protection includes cycle - by - cycle current limiting and thermal shutdown. other safety features include battery temperature monitoring, charge status indication and programmable timer to cease the charging cycle. the lp28 400 is available in a low profile (0.75mm) 10 - lead ( 4 mm 4 mm) tdfn package. order information lp28 400 f: pb - free package type qv: tqfn - 20 o utput voltage default: 4.2v/8.4v features ? up to 95% efficiency ? 4.5 - 15v operating voltage(vin) ? vin over voltage protection : 6.8 v /16.5v ? short - circuit protection ? programmable charge current up to 30 00ma ? constant - current/constant - voltage ope ration with thermal regulation to maximize charge rate without risk of overheating ? charges 1 cell and 2cell li - ion batteries directly with same chip , chargers with power path selector ? internal fixed 7hrs timer ? drainage charge current thermal regulation status outp uts for led or system interface ? indicates charge and fault conditions ? optional battery temperature monitoring before and during charge automatic sleep mode for low - power ? consumption available in 4 mm 4 mm t q fn - 2 0 package ? rohs compliant and 100 % lead (pb) - free marking information applications ? portable media players ? cellular and smart mobile phone ? car gps ? handheld battery - powered devices ? handheld computers ? charging docks and cradles device marking package shipping LP28400 lps LP28400 xxxxx qv: tqfn - 20 x: batch number s.
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 2 of 17 typical application circuit functional pin description p a c k ag e t y pe p in con f igu ra t ion s t q fn - 20 ss34 LP28400 iset 6 ts 5 sw 13,14 bs 17 regn 12 avcc 3 vref 4 cell 7 stat 8 srn 9 srp 10 gnd/pgnd pvcc/acp/acn 15,16,19,20 10r 1uf 10k 10k 10k 10k 1.5k 1uf 2.2uh 20mr 0.1u 22uf 1uf vin battery cell 2cell 22uf 1cell 22uf cms acdrv avcc vref ts iset stat cell gnd pgnd regn srn srp sw bs batdrv pvcc acn acp LP28400 lp9007 2.2uh 0.1uf 10uf 1uf 0.1uf 22uf 1uf 22uf 0.1uh 0.1uf 1uf 20mr 0r 20mr 330 1k 10k 10k 10k 10k ss34 22uf sys vin lp9006 lp9006 4k 10r 4k 22uf 1 cell battery figure 2 . a pplication with power path selector nc / nc / figure 1 . a pplication without power path selector ss34 u75 LP28400 iset 6 ts 5 sw 13,14 bs 17 regn 12 avcc 3 vref 4 cell 7 stat 8 srn 9 srp 10 gnd/pgnd pvcc/acp/acn 15,16,19,20 10r 1uf 10k 10k 10k 10k 1.5k 1uf 2.2uh 20mr 0.1u 22uf 1uf vin battery cell 2cell 22uf 1cell 22uf cms acdrv avcc vref ts iset stat cell gnd pgnd regn srn srp sw bs batdrv pvcc acn acp LP28400 lp9007 2.2uh 0.1uf 10uf 1uf 0.1uf 22uf 1uf 22uf 0.1uh 0.1uf 1uf 20mr 0r 20mr 330 1k 10k 10k 10k 10k ss34 22uf sys vin lp9006 lp9006 4k 10r 4k 22uf 1 cell battery
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 3 of 17 pin description pin pin n o. description cms 1 connect to common source of nch acfet and reverse blocking nch rbfet. place 4k resistor from cms pin to the common source of acfet and rbfet to control the turn - on speed . acdrv 2 ac adapter to system switch driver output . avcc 3 ic power supply of internal bias. put 1uf mlcc from avcc to agnd. add 10? resistor to filter the noise of power line. vref 4 3.3v reference output. a 1uf mlcc is placed from vref to gnd to make it stable . ts 5 ntc resistor connection . i set 6 fast charge current set pin. cell 7 cell selection pin. set cell pin low or floating for 2 - cell, high for 1 - cell . stat 8 open - drain charge status output . srn 9 charge current sense negative input. srp 10 charge current sense positive input. a 0.1 - uf is recommended for common mode filtering from srp to agnd. a 0.1uf is placed from srp to srn for differential mode filtering. gnd 11 power ground . regn 12 5v power supply output, bypass 1u f mlcc to agnd. sw 13.14 switching node, charge current output inductor connection. connect a 47 - nf bs capacitor from sw to bs . pvcc 15.16 ic power supply of power device of charger. put 10uf mlcc from pvcc to pgnd . bs 17 boostrap pin. place a 0.047u - f mlcc from sw to bs . batdrv 18 battery discharge mosfet gate driver output. connect a 1kohm resistor to the gate of the p - channel power mosfet(batfet). connect the source of the batfet to the system load voltage node. connect the drain of the batfet to the battery pack positive node. the internal gate drive is asymmetrical to allow a quick turn - off and slower turn - on. the internal break - before - make logic with respect to acdrv. there is an internal 50k pull - down resistor from batdrv to ground . acn 19 adaptor current sense resistor negative input. a 0.1 - uf from acn to agnd is recommended for common mode filtering. a 0.1uf is placed from acn to acp for differential mode filtering . ac p 20 adaptor current sense resistor positive input. a 0.1 - uf from acp to agnd is recommended for common mode filtering. a 0.1uf is placed from acn to acp for differential mode filtering .
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 4 of 17 operating flow chart
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 5 of 17 typical application circuit figure 3 . lp28 4 0 0 application 2cell circuit figure 4 . lp28 4 00 application 2l ed circuit figure 5 . lp28 4 00 application of charger circuit and usb power cms acdrv avcc vref ts iset stat cell gnd pgnd regn srn srp sw bs batdrv pvcc acn acp LP28400 lp9007 2.2uh 0.1uf 10uf 1uf 0.1uf 22uf 1uf 22uf 0.1uh 0.1uf 1uf 20mr 0r 20mr 330 1k 10k 10k 10k 10k ss34 22uf vin sys lp9006 lp9006 4k 10r 4k 22uf 2cell battery cms acdrv avcc vref ts iset stat cell gnd pgnd regn srn srp sw bs batdrv pvcc acn acp LP28400 lp9007 2.2uh 0.1uf 10uf 1uf 0.1uf 22uf 1uf 22uf 0.1uh 0.1uf 1uf 20mr 0r 20mr 1k 10k 10k 10k 10k ss34 22uf sys vin lp9006 lp9006 4k 10r 4k 22uf 1 cell battery 330 lp9006 10k lp9007 lp9014 100mr 100k 100k 10k larger current charge select cms acdrv avcc vref ts iset stat cell gnd pgnd regn srn srp sw bs batdrv pvcc acn acp LP28400 lp9007 2.2uh 0.1uf 10uf 1uf 0.1uf 22uf 1uf 22uf 0.1uh 0.1uf 1uf 100mr 0r 20mr 330 1k 10k 10k 10k 10k ss34 22uf sys vin lp9006 lp9006 4k 10r 4k 22uf 1 cell1 battery nc / nc / nc / nc / nc / nc / cms acdrv avcc vref ts iset stat cell gnd pgnd regn srn srp sw bs batdrv pvcc acn acp LP28400 lp9007 2.2uh 0.1uf 10uf 1uf 0.1uf 22uf 1uf 22uf 0.1uh 0.1uf 1uf 20mr 0r 20mr 330 1k 10k 10k 10k 10k ss34 22uf vin sys lp9006 lp9006 4k 10r 4k 22uf 2cell battery cms acdrv avcc vref ts iset stat cell gnd pgnd regn srn srp sw bs batdrv pvcc acn acp LP28400 lp9007 2.2uh 0.1uf 10uf 1uf 0.1uf 22uf 1uf 22uf 0.1uh 0.1uf 1uf 20mr 0r 20mr 1k 10k 10k 10k 10k ss34 22uf sys vin lp9006 lp9006 4k 10r 4k 22uf 1 cell battery 330 lp9006 10k lp9007 lp9014 100mr 100k 100k 10k larger current charge select cms acdrv avcc vref ts iset stat cell gnd pgnd regn srn srp sw bs batdrv pvcc acn acp LP28400 lp9007 2.2uh 0.1uf 10uf 1uf 0.1uf 22uf 1uf 22uf 0.1uh 0.1uf 1uf 100mr 0r 20mr 330 1k 10k 10k 10k 10k ss34 22uf sys vin lp9006 lp9006 4k 10r 4k 22uf 1 cell1 battery
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 6 of 17 function block diagram f b e n 1 i s e t 1 s h u t d o w n c i r c u i t r y u v l o s o f t s t a r t c o n t r o l a n d d r i v e r l o g i c a d j u s t a b l e c u r r e n t l i m i t s l o p e c o m p e n s a s i o n o s c i l l a t o r o v p v d d 1 l x v s s o t p s h o r t c i r c u i t c o m p . e r r o r a m p . p w m c o m p . c u r r e n t s e n s e a m p . 1 0 a 1 0 k ~ 1 0 0 k 2 . 5 a ~ 0 . 5 a g a t e d r i v e r c u r r e n t l i m i t u v l o t s d r e f v d d 2 e n 2 o u t 2 i s e t 2 v s s f b e n 1 i s e t 1 s h u t d o w n c i r c u i t r y u v l o s o f t s t a r t c o n t r o l a n d d r i v e r l o g i c a d j u s t a b l e c u r r e n t l i m i t s l o p e c o m p e n s a s i o n o s c i l l a t o r o v p v d d 1 l x v s s o t p s h o r t c i r c u i t c o m p . e r r o r a m p . p w m c o m p . c u r r e n t s e n s e a m p . 1 0 a 1 0 k ~ 1 0 0 k 2 . 5 a ~ 0 . 5 a g a t e d r i v e r c u r r e n t l i m i t u v l o t s d r e f v d d 2 e n 2 o u t 2 i s e t 2 v s s
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 7 of 17 absolute maximum ratings ? input voltage to gnd (v in ) -------------------------------------------------------- ----------------- -------------------- 20 v ? acdrv, bs ------------------------------------------------------------------------- ----------------- ------------------------- 26v ? acp, acn, cms, stat, batdrv, srp, srn ,sw -------------------------------- ------------ 0.3v to v in +0.3v ? regn, ts, cell ---------------------------------------------------------------- -------------- ------------------- - 0.3vto 7v ? bat short - circuit duration --------------------------------------------------- --------- ------ ------------------- continuous ? bat pin current --------------------------------------------------------------------- ----------- --------------------- 30 00ma ? iset pin current ----------------------------------------------------------------------------- ----------- ---------------- 800a ? maximum junction temperature -------------------------------------------------------- --------- -------------------- 125c ? operating junction temperature range (t j ) -------------------------------------- ------- -------------- - - 40 to 85 c ? maximum sold ering temperature (at leads, 10 sec) ----------------------------- ------ ------------------------- 260 c thermal information ? maximum power dissipation (pd ,ta<40 c) ---------------------------------- ----- ------------ -- -------------------- 2 w ? thermal resistance (ja) ------------- ---------------------------------------------------------------------------- 40 /w electrical characteristics 4.5v v(pvcc, avcc) 15v, C 20 c < tj + 125 c, typical values are at ta = 25 c, with respect to agnd (unless otherwise noted) symbol parameter conditions min typ. max units v in adapter /usb voltage range 4.5 5 15 v vuvlo ac under - voltage rising measure on avcc 3.3 v vuvlo_hys ac under - voltage 300 mv vsleep sleep mode threshold vavcc C vsrn falling 100 mv vsleep_hys hysteresis vavcc C vsrn rising 200 mv vacset acset voltage range rsense = 20m? 0 vref v iacset acset input bias current 25 - 25 ua vacp - acn ac current full scale sense voltage vacset=vref, rsense = 20m? 95 100 105 mv vacset=float, rsense = 20m? 71 75 79 mv vacset= gnd , rsense = 20m? 46 50 54 mv icc input supply current vavcc > vuvlo, vavcc > vsrn, vbat= 4.2v/ 8.4v, charge disabled 1.2 1.5 ma vavcc > vuvlo, vavcc > vsrn, charge enabled, switching 15 ma i bat bat pin current s leep mode, vavcc>vuvlo,vsrn>vavcc 15 ua btst, sw, srp, srn, vavcc > vuvlo, vavcc > vsrn, iset < 40mv, vbat= 4.2v/ 8.4v, charge disabled 25 ua
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 8 of 17 btst, sw, srp, srn, vavcc > vuvlo, vavcc > vsrn, iset > 120mv, vbat=8.4v, charge done 25 ua vfloat regulated output (float) voltage &(// 95()7- r&wrr& LP28400 4.158 4.2 4.242 v cell = gnd , tj = 0c to 85c lp28 400 8.358 8.4 8.442 v fsw pwm switching frequency 1.32 1.5 1.68 mhz viset iset voltage range 0 v ref v iiset iset input bias current 25 - 25 ua vsrp - srn - cc charge current full scale sense voltage viset=vref 71 75 79 mv viset=float 46 50 54 mv viset=agnd 21 25 29 mv vsrp - srn - cp charge current full scale sense voltage in pre - charge viset=vref 7.1 7.5 7.9 mv viset=float 4.6 5.0 5.4 mv viset=agnd 2.1 2.5 2.9 mv t term_deg deglitch time vsrn > vrech and ichg < iterm 100 ms vlowv precharge to fast charge transition threshold cell = vref, measured on srn 2.85 2.9 2.95 v cell = agnd, measured on srn 5.7 5.8 5.9 v vlowv_hys fast charge to precharge hysteresis cell = vref, measured on srn 200 mv cell = agnd, measured on srn 400 mv kterm termination set factor termination of fast charge current 10% vrechg recharge threshold, below regulation voltage limit, vbat_reg - vsrn cell=vref , measured on srn 100 130 160 mv cell = gnd, measured on srn 200 260 320 mv tpre - charge pre - charge timer 1848 2100 2352 s tfast - charge fast - charge timer 22176 25200 28224 s vvref_reg vref regulator voltage vavcc > vuvlo, no load 3.13 3.3 3.47 v ivref_lim vref current limit vvref=0v,vavcc> vuvlo 40 ma vregn_reg regn regulator voltage vavcc > 10 v 5 5.3 5.6 v iregn_lim regn current limit vregn = 0 v, vavcc > 10v 50 ma rds high - side ron vbs - vsw=5v 110 p 5 low - side ron vregn=5v 110 p 5 rds_bat_off batfet turn - off resistance vavcc > 5v 100 5 rds_bat_on batfet turn - on resistance vavcc > 5v 20 k 5 vbatdrv_reg batfet drive voltage vbatdrv_reg =vacn - vbatdrv when vavcc > 4.2 7 v
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 9 of 17 5v and batfet is on iocp_hsfet current limit on hsfet measure on hsfet 6 a vin ovp over voltage protection cell = vref 6.4 6.6 6.8 v cell = gnd 16.1 16.5 16.9 v vacov_hys ac over - voltage falling hysteresis cell = vref 200 mv cell = gnd 500 mv t acov_rise_deg ac over - voltage rising deglitch to turn off acfet and disable charge avcc rising 1 s t acov_fall_deg ac over - voltage falling deglitch to turn on acfet avcc falling 25 ms vltf cold temperature threshold, ts pin voltage rising threshold charger suspends charge. as percentage to vref 72.5 73.5 74.5 % vltf_hys hot temperature hysteresis, ts pin voltage falling as percentage to vvref 0.2 0.4 0.6 % vhtf hot temperature ts pin voltage rising threshold as percentage to vvref 46.6 47.2 47.8 % vtco cut - off temperature ts pin voltage falling threshold as percentage to vvref 44.2 44.7 45.2 % tj_reg junction temperature charging 125 tshut thermal shutdown temperature temperature rising 160 tshut_hys thermal shutdown hysteresis 30
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 10 of 17 typical operating characteristics figure 6 . power up figure 7 power up(no batt) figure 8 . batfet to acfet transition during powerup figure 9 . over - voltage protection
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 11 of 17 figure 10 . over - voltage release figure 1 1 . soft start figure 1 2 . discontinuous conduction mode switching figure 1 3 . continuous conduction mode switching
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 12 of 17 figure 1 4 . charge enable by ts figure 1 5 . charge disable by ts figure 1 6 . battery insertion and removal figure 1 7 . battery to ground short protection
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 13 of 17 typical charge profile efficiency vs output current
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 14 of 17 operation application the lp28 400 is a constant current, constant voltage 1 - cell and 2 - cell li - ion battery charger controller that uses a current mode pwm step - down (buck) switching architecture. the charge current is set by an ext ernal sense resistor across the srp and srn pins. v oltage amplifier and the resistor divider provide regulation with 1% accuracy. normal charge cycle the lp28 400 series offers a high accuracy voltage r egulator on for the charging voltage. the lp28 400 uses cell pin to select number of cells with a fixed 4.2v/cell. connecting cell to agnd or floating cell sets 2 cell output, and connecting to vref sets 1 cell output cell pin voltage ulation gnd or floating 8.4v vref 4.2v normal charge cycle a charge cycle begins when the voltage at the v cc pin rises above the uvlo threshold level and when a battery is connected to the charger output. if the bat pin is less than 2.9v /5.8v , the charger enters trickle charge mode. in this mode, the lp28 400 supplies approximately 1/10 the iset rammed charge current to bring the battery volt age up to a safe level for full current charging. when the bat pin voltage rises above 2.9v /5.8v , the charger goes into the full - scale constant current charge mode. in constant current mode the charge current is set by a n external sense resistor across the srp and srn charge current is supplied to the battery. when the bat pin approaches the final float voltage (4.2v /8.4v ), lp28 400 enters constant - voltage mode and the charge current begins to decrease. when the charge c urrent drops to 1/10 of the iset rammed value, the charge cycle ends. charge current r egulation the iset input sets the maximum charging current . battery current is sensed by current sensing resistor rsr connected between srp and srn. the full - scale differential voltage between srp and srn is 75mv max. under high ambient temperature, the charge current will fold back to keep ic temperature not exceeding 125c i nput current regulation the total input current from an ac adapter or other dc sources is a function of the system supply c urrent and the battery charging current. system current normally fluctuated as portions of the systems are powered up or down. without dynamic power management (dpm), the source must be able to supply the maximum system current and the maximum available charger input current simultaneously . by using dpm, the input current regulator reduces the charging current when the summation o f system power and charge power exceeds the maxim um input power. therefore, the current capability of the ac adapter can be lo wered, reducing system cost., the sense voltage between acp and acn is 75mv typ. the acp and acn pins are used to sense across rac with default value of 20m?. however, resistors of other val ues can also be used. a larger sense resistor will give a larger s ense voltage and higher regulation accuracy, at the expense of higher conduction loss. charge termination a charge cycle is terminated when the charge current falls to 1/10th the srp and srn rammed value after the final float voltage is reached. this condition is detected by using an internal, filtered comparator to monitor the srp and sen pin. when the srp and sen pin voltage falls below 1/10 for longer than tterm_deg , charging is terminated. the charge current is latched off and the lp28 400 enters st andby mode, where the in put supply current drops to 1.2m a. (note: c/10 termination is disabled in trickle charging and thermal limiting modes). when charging, transient loads on the vsrp - srn can cause the vsrp - srn to fall below 1 /10 for short periods of t ime before the dc charge current has dropped to 1/10th the vsrp - srn rammed value. the 1 00 ms filter time ( tterm_deg ) on the termination comparator ensures that transient loads of this nature do not result in premature charge cycle termi nation. once the average charge current drops
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 15 of 17 below 1/10th the vsrp - srn rammed value, the lp28 400 terminates the charge cycle and ceases to provide any current through the bat pin. in this state, all loads on the bat pin must be supplied by the battery. charge status indicator ( stat ) the open - drain stat output indicate various charger operations as shown in the following table. these status pins can be used to driver leds or communicate to the host processor. note that off indicates the open - drain transistor is turned off. a microprocessor can be used to distin guish between these three states this method is dis cussed in the applications information section. charge state stat charging on charge done off s afety ti mers as a safety backup, the charger also provides an internal fixed 35 minutes pre - charge safety timer and an internal fixed 7 hours fast charge timer s oft - start charger current the charger automatically soft - starts the charger regulation current every time the charger goes into fast - charge to ensure there is no overshoot or stress on the output capacitors or the power converter. the soft - start cons ists of stepping - up the charge regulation current into 8 evenly divided steps up to the programmed c harge current. each step lasts around 1.4ms, for a typical rise time of 11.2ms. no external components are needed for this function. battery temperature detection the controller continuously monitors battery temperature by mea suring the voltage between the ts pin an d agnd. a negative temperature coefficient resistance (ntc) and an external voltage divider typically develop this voltage. the controller compares this voltage against its internal thresholds to determine if chargin g is allowed. to initiate a charge cycle, the battery temperature must be within the vltf to vhtf thresholds. if battery temperature is outside of this range, the controller suspends charge and waits until the battery temperature is within the vltf to vhtf range. during the charge cycle the battery temperature must be within the vltf to vtco thresholds. the controller suspends charge by turning off the pwm charge mosfets. assuming a ntc thermistor on the battery pack have resistance at 0c and 45c are rthcold and rthhot , the values of rt1 and rt2 can be determined by using below equations temperature sensing configuration s ystem power selector the ic automatically switches adapter or battery power to the system load. the battery is connected to the system by default during power up or during sleep mode. when the adapter LP28400 rtc1 rt2 ntc ts vref LP28400 rtc1 rt2 ntc ts vref
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 16 of 17 plugs in and the voltage is above the battery voltage, the ic exits sleep mo de. the battery is disconnected from the system and the adapter is connected to the system after exiting sleep. an automatic break - before - mak e logic prevents shoot - through currents when th e selectors switch. the acdrv is used to drive a pair of back - to - bac k n - channel power mosfets between adapter and acp with sources connected together to cms. the n - channel fet with the drain connected to the acp (q2, rbfet) provides reverse battery discharge protecti on, and minimizes system power dissipation with its low - r dson. the other n - channel fet with drain connected to adapter input (q1, acfet) separates battery from adapter , and provides a limited di/dt when connecting the adapter to the system by controlling the fet turn - on time. the /bat drv controls a p - channel pow er mosfet (q3, batfet) placed between battery and system wit h drain connected to battery. before the adapter is detected, the a cdrv is pulled to cms to keep acfet off, disconnecting the adapter from system. /batdrv stays at acn - 5v (clamp to ground) to con nect battery to system . after the device comes out of sleep mode, the system begins to switch from battery to adapter. when the adapter is removed, the ic turns off acfet and enters sleep mode to turn on p - channel batfet, connecting the battery to the syst em
preliminary datasheet lp 28400 lp 28400 - 00 version 1.0 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 17 of 17 packaging information

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